INC INC Increment memory by one INC Operation: M + 1 -> M N V - B D I Z C / . . . . . / . +----------------+-----------------------+---------+---------+----------+ | Addressing Mode| Assembly Language Form| OP CODE |No. Bytes|No. Cycles| +----------------+-----------------------+---------+---------+----------+ | ZeroPage | INC $FF | $E6 | 2 | 5 | | ZeroPage,X | INC $FF,X | $F6 | 2 | 6 | | Absolute | INC $FFFF | $EE | 3 | 6 | | Absolute,X | INC $FFFF,X | $FE | 3 | 7 | +----------------+-----------------------+---------+---------+----------+ For penalty cycles on the 65816, check the desired addressing mode. 4510 Versions: +----------------+-----------------------+---------+---------+----------+ | Addressing Mode| Assembly Language Form| OP CODE |No. Bytes|No. Cycles| +----------------+-----------------------+---------+---------+----------+ | Implied | INC | $1A | 1 | 1s | | ZeroPage | INC $FF | $E6 | 2 | ? | | Absolute | INC $FFFF | $EE | 3 | ? | | ZeroPage,X | INC $FF,X | $F6 | 2 | ? | | Absolute,X | INC $FFFF,X | $FE | 3 | ? | +----------------+-----------------------+---------+---------+----------+ s Instruction requires 2 cycles when CPU is run at 1 MHz or 2 MHZ 65816 Extensions: +----------------+-----------------------+---------+---------+----------+ | Addressing Mode| Assembly Language Form| OP CODE |No. Bytes|No. Cycles| +----------------+-----------------------+---------+---------+----------+ | Implied | INC | $1A | 1 | 2 | +----------------+-----------------------+---------+---------+----------+