ROL          ROL Rotate one bit left (memory or accumulator)          ROL

               +------------------------------+
               |                              |
               |   +-+-+-+-+-+-+-+-+    +-+   |
  Operation:   +-< |7|6|5|4|3|2|1|0| <- |C| <-+         N V - B D I Z C
                   +-+-+-+-+-+-+-+-+    +-+             / . . . . . / /

  +----------------+-----------------------+---------+---------+----------+
  | Addressing Mode| Assembly Language Form| OP CODE |No. Bytes|No. Cycles|
  +----------------+-----------------------+---------+---------+----------+
  |  Accumulator   |   ROL A               |   $2A   |    1    |    2     |
  |  ZeroPage      |   ROL $FF             |   $26   |    2    |    5     |
  |  ZeroPage,X    |   ROL $FF,X           |   $36   |    2    |    6     |
  |  Absolute      |   ROL $FFFF           |   $2E   |    3    |    6     |
  |  Absolute,X    |   ROL $FFFF,X         |   $3E   |    3    |    7     |
  +----------------+-----------------------+---------+---------+----------+
  For penalty cycles on the 65816, check the desired addressing mode.


 4510 Versions:

  +----------------+-----------------------+---------+---------+----------+
  | Addressing Mode| Assembly Language Form| OP CODE |No. Bytes|No. Cycles|
  +----------------+-----------------------+---------+---------+----------+
  |  ZeroPage      |   ROL $FF             |   $26   |    2    |    4r    |
  |  Accumulator   |   ROL A               |   $2A   |    1    |    1s    |
  |  Absolute      |   ROL $FFFF           |   $2E   |    3    |    5r    |
  |  ZeroPage,X    |   ROL $FF,X           |   $36   |    2    |    5pr   |
  |  Absolute,X    |   ROL $FFFF,X         |   $3E   |    3    |    5pr   |
  +----------------+-----------------------+---------+---------+----------+
  p Add 1 if page boundary is crossed
  r Add 1 if clock speed is at 40 MHz
  s Instruction requires 2 cycles when CPU is run at 1 MHz or 2 MHZ